A 533MHz, air-cooled BiCMOS microprocessor implements a 3-way superscalar 6-stage pipeline. The 150mm2 die integrates separate 2kB instruction and data caches and a 32kB unified L2 cache with 0.8ns and 1.3ns access times, respectively. The die is in a 0.5mm five-layer-metal process with an additional layer of local interconnect and dissipates <85W.
A 0.35um 5-metal-layer process technology, flip-chip packaging and circuit design techniques achieve a clock frequency double that of the previous Sparc V9 design. The die measures 12.5x12.5mm2 and dissipates <30W at 2.5V. Circuits interface to a 3.3V system.
A microprocessor for mainframe applications features dual fixed-point, floating-point and instruction units that check each other for increased reliability. System operation up to 356MHz is shown. The calculated dissipation is 38W at 2.5V and 310MHz. The 17.35x17.3mm2 single-issue microprocessor has unified 64kB L1 cache.
A 300MHz, 7.5M-transistor, dynamic-execution microprocessor on a 203mm2 die in a 2.8V, 0.35um, four-metal-layer technology features separate 16kB on-chip instruction and data caches and a dedicated L2 cache bus with source synchronous clocking that supports multiple external cache configurations.
An 8.8M-transistor x86 processor with multi-media extensions, a 32kB I-cache, a 32kB D-cache and a frequency-multiplying PLL based on a bandgap voltage reference uses a 0.35um five-layer metal process including tungsten local interconnect and shallow trench isolation. The die is in a 321-pin PGA using solder-bump flip-chip technology.
This quad-issue, 550MHz microprocessor includes hardware support for MPEG-II encode and decode through addition of 13 instructions to the Alpha architecture. The 1.38cm2 die in a 0.35mm four-layer-metal process includes 3.5M transistors and is estimated to deliver 15SPECint95 and 20SPECfp95.
An estimated 40SPECint95, 60SPECfp95 Alpha microprocessor features 64kB 2-way associative instruction cache and 64kB 2-way associative dual-ported data cache. External cache and memory bandwidths are 4GB/s and 2GB/s respectively. The 15.2M-transistor 16.4x18.4mm2 chip, in 2.0V, 0.35um, 6-layer-metal CMOS dissipates 72W.
Go back to Table of Contents